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Application Note 1081
the converter directly. Therefore, an inductor with lowest DC
resistance should be selected for highest efficiency.
In order to avoid saturation of the inductor, the inductor
should be rated at least for the maximum output current plus
the inductor ripple current.
TABLE 2. RECOMMENDED INDUCTORS
OUTPUT INDUCTOR
CURRENT VALUE VENDOR PART # COMMENTS
0mA to 10 μ H Coilcraft DO3316P-103 High
600mA Coilcraft DT3316P-103 Efficiency
Input Capacitor Selection
Because of the nature of the buck converter having a
pulsating input current, a low ESR input capacitor is required
for best input voltage filtering and minimizing the
interference with other circuits caused by high input voltage
spikes.
The input capacitor should have a minimum value of 10μF
and can be increased without any limit for better input
voltage filtering. The input capacitor should be rated for the
maximum input ripple current calculated as:
I RMS = I O ( max ) × -------- × ? 1 – -------- ?
Sumida CDR63B-100
Sumida CDRH5D28-100
Coilcraft DO1608C-100
Smallest
V O ? V O ?
V I ? V I ?
0mA to
300mA
10 μ H
Sumida CDRH4D28-100 Solution
Coilcraft DS1608C-103 High
Efficiency
Murata LQH4C100K04
Smallest
Solution
The worst case RMS ripple current occurs at 50% duty
cycle.
Ceramic capacitors show good performance because of
their low ESR value, and because they are less sensitive to
voltage transients, compared to tantalum capacitors.
V O
= V O × ----------------- × -----------------
I RMS ( C ) L × f
? V O = V O × ? ----------------- ? × ? -------------------------- + ESR ?
? L × f ? ? 8 × C × f ?
? ?
Output Capacitor Selection
For best performance, a low ESR output capacitor is
needed. If an output capacitor is selected with an ESR value
≤ 120m ? , its RMS ripple current rating will always meet the
application requirements. The RMS ripple current is
calculated as:
1 – --------
V I 1
O 2 × 3
The overall output ripple voltage is the sum of the voltage
spike caused by the output capacitor ESR plus the voltage
ripple caused by charge and discharging the output
capacitor:
V O ? ?
? 1 – ------- ?
V I 1
O
? ?
Where the highest output voltage ripple occurs at the highest
input voltage.
TABLE 3. RECOMMENDED CAPACITORS
CAPACITOR
VALUE ESR/m ? VENDOR PART # COMMENTS
10 μ F 50 Taiyo Yuden Ceramic
JMK316BJ106KL
Place the input capacitor as close as possible to the input pin
of the IC for best performance.
Layout Considerations
As for all switching power supplies, the layout is an important
step in the design of ISL6413 based power supply due to
high switching frequency and low noise LDO
implementations.
Allocate two board levels as ground planes, with many vias
between them to create a low impedance, high-frequency
plane. Tie all the device ground pins through multiple vias
each to this ground plane, as close to the device as possible.
Also tie the exposed pad on the bottom of the device to this
ground plane.
Use wide and short traces for the high current paths. The
input capacitor should be placed as close as possible to the
IC pins as well as the inductor and output capacitor. Use a
common ground node to minimize the effects of ground
noise.
Conclusion
The ISL6413 is a system electronic regulator for 802.11
wireless chipset power management. The IC offers a
significant power savings compared to LDO options and
features small footprint and high integration, which make it
an ideal single chip power solution for various 802.11 chipset
power supplies.
47 μ F
100
Sanyo 6TPA47M
POSCAP
68 μ F
100
Sprague
Tantalum
References
594D686X0010C2T
For Intersil documents available on the web, see
http://www.intersil.com/
[1] ISL6413 Data Sheet, Intersil Corporation, File No.
FN9129.
7
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